RTOS

Real time OS implements mechanism to support low latency to requests (mainly from HW) Used in critical system.

• Multi-tasking
• Preemtion (time sharing & context switching)
• Interrupt handler == ISR (interrupt service routine) <--> Polling
• Mutual exclusion (semaphore)

Dead lock/ Example: circular waiting

A <- B <- C and then C <- A

ISR

• Callback called when interrupt occur
• An interrupt vector is the memory address of an interrupt handler, or an index into an array called an interrupt vector table that contains the memory addresses of interrupt handlers.
• Cpu registers define what kind of interrupt (I2c, Packet Rx, HW so on)
• SW / HW interrupt

(From Wiki) A hardware interrupt causes the processor to save its state of execution and begin execution of an interrupt handler.

Software interrupts are usually implemented as instructions in the instruction set, which cause a context switch to an interrupt handler similar to a hardware interrupt.